Today, many types of digital signal processing units such as a computer, a digital video signal processing unit, and a digital audio signal processing unit are in practical use. Moreover, the variety of users' demands for each digital signal processing unit has increased.
As one of the methods for providing a digital signal processing unit capable of responding to the variety of users' preferences, the digital signal processing unit can be provided with an assortment of optional equipments attachable thereto. Users can obtain the digital signal processing unit equipped with the suitable features for their preferences by selecting from among the assortment of optional equipments and attaching the selected optional equipment to the digital signal processing unit.
In order to provide various types of optional equipments, there emerges a need for the standardization of the signal transmission between the digital signal processing unit and the optional equipment. The standardized protocol for signal transmission must be capable of transmitting various signals required in each optional equipment.
In many cases, the signal transmission protocol between the digital signal processing unit and the optional equipment is a master/slave method. In the system of the master/slave method in general, the digital signal-processing unit is a master and the optional equipment is a slave. In communications using the master/slave method, the digital signal processing unit acting as a master usually determines what kind of signal will be transmitted from the digital signal processing unit to the optional equipment and what kind of signal will be transmitted from the optional equipment to the digital signal processing unit.
Referring to FIG. 9 and FIG. 10, the prior art transmission system will be described.
FIG. 9 is a block diagram of the prior art transmission system. The transmission system in FIG. 9 comprises a first transmission apparatus 901 and a second transmission apparatus 902.
The first transmission apparatus 901 is a digital signal processing unit; the second transmission apparatus 902 is an optional equipment thereof. The second transmission apparatus 902 in FIG. 9 is an option card complying with the standard protocol for IC cards. The second transmission apparatus 902 is attached into an option slot provided to the first transmission apparatus 901 and complying with the standard for IC cards, thereby communicating with the first transmission apparatus 901.
Since the present invention relates to a transmission apparatus and a transmission method, a digital signal processing unit and an optional equipment thereof having a transmission function are referred to as transmission apparatuses in this description.
The first transmission apparatus 901 in FIG. 9 is a personal digital assistant.
The first transmission apparatus 901 comprises a CPU 911, a first buffer memory 912 and a first input/output section 913. The CPU 911, the first buffer memory 912 and the first input/output section 913 are connected with each other via an internal bus 914 and can mutually transmit signals.
The second transmission apparatus 902 comprises a control section 921, a second buffer memory 922, an external input/output section 923 and a second input/output section 924. The control section 921 is connected with the second buffer memory 922, the external input/output section 923 and the second input/output section 924, and can transmit signals to each other. The second buffer memory 922 is connected with the control section 921 and the second input/output section 924, and can transmit signals to each other.
The external input/output section 923 in the second transmission apparatus 902 is connected with an external device.
The first input/output section 913 and the second input/output section 924 can mutually transmit data signals and the like according to the standard protocol for IC cards. In the signal transmission shown in FIG. 9, the first transmission apparatus 901 is a master and the second transmission apparatus 902 is a slave.
The CPU 911 in the first transmission apparatus 901 can transmit command signals and data signals to the second transmission apparatus 902 and receive response signals and data signals from the second transmission apparatus 902 via the first input/output section 913 and the second input/output section 924.
Through the use of the above-mentioned transmission system, the first transmission apparatus 901 not only can communicate with the second transmission apparatus 902, but also can communicate with the external device connected to the external input/output section 923. In the communications between the first transmission apparatus 901 and the external device, the second transmission apparatus 902 acts as an intermediary for their communications.
The first input/output section 913 and the second input/output section 924 are connected to each other by nine lines consisted of one command line 931, four data lines 932, one clock line 933, one power source line 934 and two ground lines 935 (which comply with one of the standard specifications of IC cards).
Hereinafter, the signal transmission method complying with the standard protocol for IC cards will be described.
The second transmission apparatus 902 is supplied with power from the first transmission apparatus via the power source line 934.
The first input/output section 913 and the second input/output section 924 carry out synchronous data transmission to each other. In the synchronous data transmission, signals are bidirectionally transmitted via the command line 931 or the data lines 932 in synchronous with the clock signals transmitted from the first input/output section 913 to the second input/output section 924 via the clock line 933.
For each of the command line 931 and the four data lines 932, each of the first input/output section 913 and the second input/output section 924 comprises: an output section (having a three-state function wherein an output impedance becomes high in input mode) having a full duplex data buffer for outputting a signal in synchronous with a clock signal; and an input section having a full duplex data buffer for inputting a signal in synchronous with a clock signal.
The full duplex data buffer for transmission comprises: a parallel-in/serial-out shift register which stores a data signal in the process of being sent; and a parallel-in/parallel-out register which stores the next data signal to be sent. When the parallel-in/serial-out shift register has finished transmitting the data signal in the process of being sent, the data signal stored in the parallel-in/parallel-out register is automatically loaded into the parallel-in/serial-out shift register. The parallel-in/serial-out shift register keeps transmitting data signals.
When the data signal stored in the parallel-in/parallel-out register is loaded into the parallel-in/serial-out shift register, the CPU 911 in the first transmission apparatus (or either the control section 921 or the second buffer memory 922 in the second transmission apparatus) loads the next data signal into the parallel-in/parallel-out register before the completion of transmitting the data signal loaded into the parallel-in/serial-out shift register.
Likewise, the full duplex data buffer for reception comprises: a serial-in/parallel-out shift register which stores a data signal in the process of being received; and a parallel-in/parallel-out register which stores the received data signal. When the serial-in/parallel-out shift register has finished receiving the data signal in the process of being received, the data signal stored in the serial-in/parallel-out shift register is automatically loaded into the parallel-in/parallel-out register. The serial-in/parallel-out shift register keeps receiving data signals.
When the data signal stored in the serial-in/parallel-out shift register is loaded into the parallel-in/parallel-out register, the CPU 911 in the first transmission apparatus (or either the control section 921 or the second buffer memory 922 in the second transmission apparatus) processes the data signal loaded into the parallel-in/parallel-out register before the serial-in/parallel-out shift register finishes receiving a new data signal again.
Thus, data signals are transmitted continuously regardless of the information amount of the data signals.
The CPU 911 in the first transmission apparatus 901 can transmit various types of command signals or data signals to the second transmission apparatus 902 via the-first input/output section 913 and the second input/output section 924. In response to the command signal transmitted from the first transmission apparatus 901, the control section 921 in the second transmission apparatus 902 transmits various types of response signals or response signals and data signals to the first transmission apparatus 901 via the second input/output section 924 and the first input/output section 913.
Parts (a) to (c) of FIG. 10 are timing charts showing various types of signal transmission between the first input/output section 913 and the second input/output section 924.
The signal transmission shown in part (a) of FIG. 10 will be described. First, the CPU 911 transmits a command signal 1001 to the second transmission apparatus 902 via the first input/output section 913, the command line 931 and the second input/output section 924. The transmitted command signal 1001 (which can be a command signal with data) is only for requesting a response signal, not for requesting the transmission of the data signal. After receiving the command signal 1001, the control section 921 generates a response signal responding to the command signal and transmits the response signal 1002 to the first transmission apparatus 901 via the second input/output section 924, the command line 931 and the first input/output section 913.
The command signal 1001 and the response signal 1002 are transferred in synchronous with a clock signal to be transmitted via the clock line 933. In part (a) of FIG. 10, the data lines 932 are not used as shown by the numeral 1004.
The signal transmission shown in part (b) of FIG. 10 will be described. First, the CPU 911 transmits a command signal 1011 to the second transmission apparatus 902 via the first input/output section 913, the command line 931 and the second input/output section 924. The transmitted command signal 1011 determines what kind of data signal is to be transmitted from the first transmission apparatus 901 to the second transmission apparatus 902. After receiving the command signal 1011, the second transmission apparatus is informed that a data signal is to be inputted. The control section 921 generates a response signal 1012 responding to the command signal and transmits the response signal 1012 to the first transmission apparatus 901. The CPU 911 stores a data signal 1013 to be transmitted in the first buffer memory 912 and loads the first N bytes of the data signal 1013 to be transmitted into the first input/output section 913 (N bytes are the information amount of a data signal which can be loaded into the data buffer of the four data lines 932 in the first input/output section 913.).
Next, the first transmission apparatus 901 transmits the data signal 1013 stored in the first input/output section 913 and the first buffer memory 912 to the second transmission apparatus 902 via the first input/output section 913, the data lines 932 and the second input/output section 924. The data signal 1013 stored in the first buffer memory 912 is sequentially loaded in the data buffer of the first input/output section 913 and transmitted. The second transmission apparatus 902 stores the inputted data signal 1013 in the second buffer memory 922.
The command signal 1011, the response signal 1012 and the data signal 1013 are transferred in synchronous with a clock signal to be transmitted via the clock line 933.
The CPU 911 transmits a command signal 1014 to the second transmission apparatus 902 via the first input/output section 913, the command line 931 and the second input/output section 924. The transmitted command signal 1014 is for requesting a data signal to be transmitted from the second transmission apparatus 902 to the first transmission apparatus 901. The control section 921 generates a response signal 1015 responding to the command signal and transmits the response signal 1015 to the first transmission apparatus 901. After receiving the command signal 1014, the second transmission apparatus 902 stores a data signal 1016 requested by the second buffer memory 922 and loads the first N bytes of the requested data signal 1016 into the second input/output section 924 (N bytes are the information amount of a data signal which can be loaded into the data buffer of the four data lines 932 in the second input/output section 924.).
Then, the first transmission apparatus 901 transmits a clock signal to the second transmission apparatus 902 via the clock line 933. The data signal 1016 requested by the first transmission apparatus 901 is transferred from the second transmission apparatus to the first transmission apparatus 901. The data signal 1016 stored in-the second input/output section 924 and the second buffer memory 922 is transmitted to the first transmission apparatus 901 via the second input/output section 924, the data lines 932 and the first input/output section 913. The CPU 911 stores the inputted data signal 1016 in the first buffer memory 912.
The command signal 1014, the response signal 1015 and the data signal 1016 are transferred in synchronous with a clock signal to be transmitted via the clock line 933.
The signal transmission shown in part (c) of FIG. 10 will be described. The signal transmission shown in part (c) of FIG. 10 is basically the same as that shown in part (b) of FIG. 10. The information amount of the data signal transmitted in the signal transmission shown in part (c) of FIG. 10 is larger than the information amount of the data signal transmitted in the signal transmission of part (b) of FIG. 10. This is the only difference between them.
The CPU 911 transmits a command signal 1021 to the second transmission apparatus 902 via the first input/output section 913, the command line 931 and the second input/output section 924. In response to the transmitted command signal 1021, a response signal 1022 is transmitted from the first transmission apparatus 901 to the second transmission apparatus 902. Then, a data signal 1023 is transmitted from the first transmission apparatus 901 to the second transmission apparatus 902, or from the second transmission apparatus 902 to the first transmission apparatus 901. The details of the transmission method are the same as those of the method described in part (b) of FIG. 10.
The information amount of a data signal to be transmitted varies between part (b) of FIG. 10 and part (c) of FIG. 10; however, as described above, the first input/output section 913 and the second input/output section 924 each having a full duplex data buffer continuously transmit data signals.
As shown in parts (a) to (c) of FIG. 10, in the transmission system of FIG. 9, the levels of the command line 931 and the four data lines 932 become high when a signal is not transmitted.
In parts (b) and (c) of FIG. 10, data signals are transmitted via the four data lines 932. As for the four data lines 932, there are cases where all of them are used at the same time and where only one of them is used.
As described above, it is impossible for the optional equipment acting as a slave to transmit a signal to the digital signal processing unit or make the digital signal processing unit transmit a signal to the optional equipment unless the digital signal processing unit acting as a master specifies the transmission of the signals, even if there is a signal which needs to be transmitted from the optional equipment to the digital signal processing unit or from the digital signal processing unit to the optional equipment.
However, some of the optional equipments (required a high responsivity) are required to process signals quickly in response to the requests from external devices and so on. So they cannot wait for the digital signal processing unit acting as a master to specify the transmission of the signals which should be processed.
In order for the optional equipment acting as a slave to make the digital signal processing unit acting as a master designate preferentially the transmission of the signals which should be processed, there is a method in which an interrupt signal is transmitted from the optional equipment to the digital signal processing unit. The central processing unit (referred to as “CPU”) of the digital signal processing unit inputs the interrupt signal and carries out the interrupt process. In the interrupt process, the CPU designates the signal transmission requested by the optional equipment preferentially and the requested signal is transmitted between the optional equipment and the digital signal processing unit.
If, however, a data line for transmitting data signals and an interrupt signal line for transmitting interrupt signals are provided independently, the digital signal processing unit and the optional equipment would need to have many input/output terminals.
There is a strong demand for a digital signal processing unit and an optional equipment to be downsized in the market. The transmission system which comprises a digital signal processing unit and an optional equipment having many input/output lines (having data signal lines and an interrupt signal line independently) has a high responsivity; however, in such a system it is difficult to provide a small-sized and low-cost digital signal processing unit and a small-sized and low-cost optional equipment.
The present invention is to provide a small-sized and low-cost transmission apparatus and a transmission method (having a high responsivity) capable of transmitting an interrupt signal with a small number of input/output terminals (without a dedicated line for interrupt signals).
If a dedicated line for interrupt signals is added to the optional equipment complying with the standard where no dedicated line for interrupt signals is provided, the compatibility between the optional equipment with the interrupt signal line and the standard optional equipment without the interrupt signal line would not be maintained. This kind of optional equipment is extremely user-unfriendly.
As the optional equipment complying with the standard where no dedicated line for interrupt signals is provided, IC cards and applied products thereof shown in the prior art and Embodiments can be taken as examples.
The present invention is to provide a transmission apparatus and a transmission method (having a high responsivity) complying with the standard where no dedicated line for interrupt signals is provided as, for example, the standard for IC cards described in this description and capable of transmitting interrupt signals.